AMF-Placer
2.0
An Open-Source Timing-driven Analytical Mixed-size FPGA Placer
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25 #ifndef _PlacementINFO
26 #define _PlacementINFO
31 #include "Eigen/SparseCore"
33 #include "Rendering/paintDB.h"
73 class PlacementSiteTypeInfo;
74 class PlacementBinInfo;
75 class CompatiblePlacementTable;
338 BELNames.insert(curBEL->getBELType());
345 tmploc.locX = curSite->X();
346 tmploc.locY = curSite->Y();
421 return std::min(std::fabs(inY -
topY), std::fabs(inY -
bottomY));
425 return std::min(std::fabs(inX -
leftX), std::fabs(inX -
rightX));
427 return std::min(std::fabs(inX -
leftX), std::fabs(inX -
rightX)) +
428 std::min(std::fabs(inY -
topY), std::fabs(inY -
bottomY));
451 return (x < rightX && x >= (
leftX - 1e-3) && y < topY && y >= (
bottomY - 1e-3));
456 return (y < topY && y >=
bottomY);
474 assert(occupationAdded >= 0);
563 inline std::set<DesignInfo::DesignCell *> &
getCells()
596 std::vector<DesignInfo::DesignCell *> cellVec;
598 for (
auto cell :
cells)
600 cellVec.push_back(cell);
602 if (cellVec[0]->isLUT())
604 float tmputilization = 0;
605 for (
auto cell :
cells)
608 tmputilization += 2.0;
612 return (
float)tmputilization /
capacity;
827 std::set<DesignInfo::DesignCell *>
cells;
880 return (x <= rightX && x >
leftX && y <= topY && y >
bottomY);
885 return (y <= topY && y >
bottomY);
915 inline std::set<DesignInfo::DesignCell *> &
getCells()
992 std::set<DesignInfo::DesignCell *>
cells;
1082 assert(forgetRatio <= 1);
1103 float limitDisplacement)
1109 assert(forgetRatio <= 1);
1113 if (dis / limitDisplacement > 1)
1114 forgetRatio /= (dis / limitDisplacement);
1241 for (
auto tmpNet : *
nets)
1243 if (tmpNet->getDriverUnits().size() == 1)
1245 if (tmpNet->getDriverUnits()[0] ==
this)
1259 for (
auto tmpNet : *
nets)
1261 if (tmpNet->getDriverUnits().size() == 1)
1263 if (tmpNet->getDriverUnits()[0] !=
this)
1582 if (curCell->
isDSP())
1586 if (curCell->
isFF())
1591 if (curCell->
isLUT())
1595 if (curCell->
isMux())
1607 assert(
false &&
"unexpected");
1724 inline std::vector<DesignInfo::DesignCell *> &
getCells()
1753 fixedCells.emplace_back(cell, siteName, BELName);
1857 std::vector<DesignInfo::DesignCellType>
1898 PUSet.insert(tmpPU);
1900 if (curPin->isOutputPort())
1911 pinOffset tmpPinOffset =
pinOffset(curPin->getOffsetXInCell(), curPin->getOffsetYInCell());
2014 for (
unsigned int pinId_net = 0; pinId_net <
unitsOfNetPins.size(); pinId_net++)
2017 auto tmpPUId = tmpPU->getId();
2019 float cellX = tmpPU->X();
2020 float pinX = tmpPU->X() + tmpPinOffset.x;
2043 for (
unsigned int pinId_net = 0; pinId_net <
unitsOfNetPins.size(); pinId_net++)
2046 auto tmpPUId = tmpPU->getId();
2048 float cellY = tmpPU->Y();
2049 float pinY = tmpPU->Y() + tmpPinOffset.y;
2095 float tmp_leftX = 1e5;
2096 float tmp_rightX = -1e5;
2097 float tmp_topY = -1e5;
2098 float tmp_bottomY = 1e5;
2100 for (
unsigned int pinId_net = 0; pinId_net <
unitsOfNetPins.size(); pinId_net++)
2107 pinX = targetPUX + tmpPinOffset.x;
2111 pinX = tmpPU->X() + tmpPinOffset.x;
2113 if (pinX < tmp_leftX)
2117 if (pinX > tmp_rightX)
2122 for (
unsigned int pinId_net = 0; pinId_net <
unitsOfNetPins.size(); pinId_net++)
2129 pinY = targetPUY + tmpPinOffset.y;
2133 pinY = tmpPU->Y() + tmpPinOffset.y;
2135 if (pinY < tmp_bottomY)
2139 if (pinY > tmp_topY)
2145 int A_ClockRegionY, A_ClockRegionX;
2148 std::pair<int, int> A_ClockLocYX(A_ClockRegionY, A_ClockRegionX);
2150 int B_cellClockRegionY, B_cellClockRegionX;
2152 B_cellClockRegionY);
2153 std::pair<int, int> B_ClockLocYX(B_cellClockRegionY, B_cellClockRegionX);
2155 float clockRegionOverhead = 0;
2161 return std::fabs(tmp_rightX - tmp_leftX) +
y2xRatio * std::fabs(tmp_topY - tmp_bottomY) +
2162 clockRegionOverhead;
2185 std::vector<float> &objectiveMatrixDiag,
2186 Eigen::VectorXd &objectiveVector,
float generalWeight,
float y2xRatio,
2187 bool updateX,
bool updateY,
bool checkClockRegion =
false)
2189 assert(updateX ^ updateY);
2198 else if (nPins < 20)
2200 else if (nPins < 50)
2202 else if (nPins < 100)
2204 else if (nPins < 200)
2212 int A_ClockRegionY, A_ClockRegionX;
2215 std::pair<int, int> A_ClockLocYX(A_ClockRegionY, A_ClockRegionX);
2217 int B_cellClockRegionY, B_cellClockRegionX;
2219 B_cellClockRegionY);
2220 std::pair<int, int> B_ClockLocYX(B_cellClockRegionY, B_cellClockRegionX);
2222 float clockRegionW = 0;
2227 if (checkClockRegion && B_cellClockRegionX != A_ClockRegionX)
2229 clockRegionW = 1 + std::abs(B_cellClockRegionX - A_ClockRegionX) * 32 /
2231 if (clockRegionW > 3)
2244 for (
unsigned int pinId_net = 0; pinId_net <
unitsOfNetPins.size(); pinId_net++)
2247 auto tmpPUId = tmpPU->getId();
2249 float curX = tmpPU->X();
2250 bool movable = !tmpPU->isFixed();
2253 addB2BNet(objectiveMatrixTripletList, objectiveMatrixDiag, objectiveVector, tmpPUId,
leftPuId,
2258 addB2BNet(objectiveMatrixTripletList, objectiveMatrixDiag, objectiveVector, tmpPUId,
rightPuId,
2279 for (
unsigned int pinId_net = 0; pinId_net <
unitsOfNetPins.size(); pinId_net++)
2282 auto tmpPUId = tmpPU->getId();
2284 float curY = tmpPU->Y();
2285 bool movable = !tmpPU->isFixed();
2288 addB2BNet(objectiveMatrixTripletList, objectiveMatrixDiag, objectiveVector, tmpPUId,
bottomPuId,
2293 addB2BNet(objectiveMatrixTripletList, objectiveMatrixDiag, objectiveVector, tmpPUId,
topPuId,
2304 std::vector<float> &objectiveMatrixDiag,
2305 Eigen::VectorXd &objectiveVector,
float generalWeight,
float y2xRatio,
2306 bool updateX,
bool updateY,
int PUIdA,
int PUIdB,
int pinIdA_net,
2309 float w = generalWeight;
2314 addB2BNet(objectiveMatrixTripletList, objectiveMatrixDiag, objectiveVector, PUIdA, PUIdB,
2324 addB2BNet(objectiveMatrixTripletList, objectiveMatrixDiag, objectiveVector, PUIdA, PUIdB,
2331 void drawNet(
float generalWeight = 1.0);
2353 inline void addB2BNet(std::vector<Eigen::Triplet<float>> &objectiveMatrixTripletList,
2354 std::vector<float> &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector,
int puId0,
2355 int puId1,
float pos0,
float pos1,
float pinOffset0,
float pinOffset1,
bool movable0,
2356 bool movable1,
float w)
2362 if (movable0 && movable1)
2367 objectiveMatrixDiag[puId0] += w;
2368 objectiveMatrixDiag[puId1] += w;
2369 objectiveMatrixTripletList.push_back(Eigen::Triplet<float>(puId0, puId1, -w));
2370 objectiveMatrixTripletList.push_back(Eigen::Triplet<float>(puId1, puId0, -w));
2371 if (fabs(pinOffset0) >
eps || fabs(pinOffset1) >
eps)
2374 objectiveVector[puId0] += w * (pinOffset0 - pinOffset1);
2375 objectiveVector[puId1] += w * (pinOffset1 - pinOffset0);
2382 objectiveMatrixDiag[puId0] += w;
2383 objectiveVector[puId0] += -w * pos1;
2384 if (fabs(pinOffset0) >
eps || fabs(pinOffset1) >
eps)
2387 objectiveVector[puId0] += w * (pinOffset0 - pinOffset1);
2394 objectiveMatrixDiag[puId1] += w;
2395 objectiveVector[puId1] += -w * pos0;
2396 if (fabs(pinOffset0) >
eps || fabs(pinOffset1) >
eps)
2399 objectiveVector[puId1] += w * (pinOffset1 - pinOffset0);
2514 PUs.push_back(curPU);
2520 inline std::vector<PlacementInfo::PlacementUnit *> &
getUnits()
2531 std::vector<PlacementInfo::PlacementUnit *>
PUs;
2595 return (x <= rightX && x >
leftX && y <= topY && y >
bottomY);
2600 return (y <= topY && y >
bottomY);
2606 macros.push_back(curMacro);
2701 for (
auto curRow : typeGrid)
2702 for (
auto curBin : curRow)
2705 for (
auto curBin : curRow)
3008 inline std::vector<DesignInfo::DesignCell *> *
3012 bool findLUT = curCell->
isLUT();
3015 std::vector<DesignInfo::DesignCell *> *res =
new std::vector<DesignInfo::DesignCell *>();
3019 getGridXY(targetX, targetY, binIdX, binIdY);
3021 assert(binIdY >= 0);
3023 assert(binIdX >= 0);
3024 assert((
unsigned int)binIdX <
LUTFFBinGrid[binIdY].size());
3025 assert(
LUTFFBinGrid[binIdY][binIdX]->inRange(targetX, targetY));
3027 std::queue<std::pair<int, int>> binXYqueue;
3028 std::set<std::pair<int, int>> reachedBinXYs;
3029 binXYqueue.emplace(binIdX, binIdY);
3030 reachedBinXYs.emplace(binIdX, binIdY);
3032 bool findItself =
false;
3034 while (binXYqueue.size() > 0)
3036 std::pair<int, int> curXY = binXYqueue.front();
3038 int curbinIdX = curXY.first, curbinIdY = curXY.second;
3042 if (bin2TargetXYDistance > displacementUpperbound)
3044 for (
auto tmpCell : curBin->
getCells())
3046 if ((tmpCell->isLUT() && findLUT) || (tmpCell->isFF() && !findLUT))
3050 float tmpPUDis = fabs(targetX - tmpX) +
y2xRatio * fabs(targetY - tmpY);
3051 if (tmpPUDis <= displacementUpperbound)
3053 if (tmpCell == curCell)
3057 res->push_back(tmpCell);
3062 for (
int nextY = curbinIdY - 1; nextY <= curbinIdY + 1; nextY++)
3064 for (
int nextX = curbinIdX - 1; nextX <= curbinIdX + 1; nextX++)
3072 if (!((
unsigned int)nextX <
LUTFFBinGrid[binIdY].size()))
3076 if (nextBin2TargetXYDistance > displacementUpperbound)
3078 std::pair<int, int> nextXY(nextX, nextY);
3079 if (reachedBinXYs.find(nextXY) == reachedBinXYs.end())
3081 reachedBinXYs.insert(nextXY);
3082 binXYqueue.push(nextXY);
3099 inline std::vector<std::vector<PlacementBinInfo *>> &
getBinGrid(
unsigned int BELTypeId)
3110 inline std::vector<std::vector<std::vector<PlacementBinInfo *>>> &
getBinGrid()
3129 assert(cellId >= 0);
3160 std::vector<float> &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector,
3161 int puId0,
int puId1,
float pos0,
float pos1,
float pinOffset0,
3162 float pinOffset1,
bool movable0,
bool movable1,
float w)
3168 if (movable0 && movable1)
3173 objectiveMatrixDiag[puId0] += w;
3174 objectiveMatrixDiag[puId1] += w;
3175 objectiveMatrixTripletList.push_back(Eigen::Triplet<float>(puId0, puId1, -w));
3176 objectiveMatrixTripletList.push_back(Eigen::Triplet<float>(puId1, puId0, -w));
3177 if (fabs(pinOffset0) >
eps || fabs(pinOffset1) >
eps)
3180 objectiveVector[puId0] += w * (pinOffset0 - pinOffset1);
3181 objectiveVector[puId1] += w * (pinOffset1 - pinOffset0);
3188 objectiveMatrixDiag[puId0] += w;
3189 objectiveVector[puId0] += -w * pos1;
3190 if (fabs(pinOffset0) >
eps || fabs(pinOffset1) >
eps)
3193 objectiveVector[puId0] += w * (pinOffset0 - pinOffset1);
3200 objectiveMatrixDiag[puId1] += w;
3201 objectiveVector[puId1] += -w * pos0;
3202 if (fabs(pinOffset0) >
eps || fabs(pinOffset1) >
eps)
3205 objectiveVector[puId1] += w * (pinOffset1 - pinOffset0);
3229 std::vector<float> &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector,
3231 bool updateX,
bool updateY)
3233 assert(updateX ^ updateY);
3238 bool movable = !tmpPU->
isFixed();
3242 -1, targetLoc, targetLoc, 0, 0,
true,
false, pseudoWeight);
3344 inline void getGridXY(
float cellX,
float cellY,
int &binIdX,
int &binIdY)
3347 float coord_offsetX = cellX -
startX;
3348 float coord_offsetY = cellY -
startY;
3349 binIdX =
static_cast<int>((coord_offsetX) /
binWidth);
3350 binIdY =
static_cast<int>((coord_offsetY) /
binHeight);
3377 else if (fY + curMacro->getBottomOffset() <
globalMinY +
eps)
3393 assert(
false &&
"wrong placement unit type");
3404 float fX = curPU->
X();
3405 float fY = curPU->
Y();
3417 else if (fY + curMacro->getBottomOffset() <
globalMinY +
eps)
3433 assert(
false &&
"wrong placement unit type");
3435 if (fX != curPU->
X() || fY != curPU->
Y())
3462 return (std::fabs(fX - targetX) + std::fabs(fY - targetY)) <
eps;
3466 float offsetX = curMacro->getCellOffsetXInMacro(curCell);
3467 float offsetY = curMacro->getCellOffsetYInMacro(curCell);
3468 float fX = targetX - offsetX;
3469 float fY = targetY - offsetY;
3474 else if (fY + curMacro->getBottomOffset() <
globalMinY +
eps)
3487 return (std::fabs(fX + offsetX - targetX) + std::fabs(fY + offsetY - targetY)) <
eps;
3491 assert(
false &&
"should not reach here");
3514 return (std::fabs(fX - targetX) + std::fabs(fY - targetY)) <
eps;
3524 else if (fY + curMacro->getBottomOffset() <
globalMinY +
eps)
3537 return (std::fabs(fX - targetX) + std::fabs(fY - targetY)) <
eps;
3541 assert(
false &&
"should not reach here");
3562 float offsetX = curMacro->getCellOffsetXInMacro(curCell);
3563 float offsetY = curMacro->getCellOffsetYInMacro(curCell);
3564 float fX = targetX - offsetX;
3565 float fY = targetY - offsetY;
3570 else if (fY + curMacro->getBottomOffset() <
globalMinY +
eps)
3590 assert(
false &&
"should not reach here.");
3648 inline void setPULegalXY(std::map<PlacementInfo::PlacementUnit *, float> &PU2X,
3649 std::map<PlacementInfo::PlacementUnit *, float> &PU2Y)
3651 for (
auto tmpPair : PU2X)
3653 PULegalXY.first[tmpPair.first] = tmpPair.second;
3655 for (
auto tmpPair : PU2Y)
3658 PULegalXY.second[tmpPair.first] = tmpPair.second;
3670 for (
auto tmpPair : PU2Sites)
3681 inline std::map<PlacementInfo::PlacementUnit *, std::vector<DeviceInfo::DeviceSite *>> &
getPULegalSite()
3692 inline std::pair<std::map<PlacementInfo::PlacementUnit *, float>, std::map<PlacementInfo::PlacementUnit *, float>> &
3704 PULegalXY.first = std::map<PlacementInfo::PlacementUnit *, float>();
3705 PULegalXY.second = std::map<PlacementInfo::PlacementUnit *, float>();
3756 assert(binIdY >= 0);
3758 assert(binIdX >= 0);
3783 return std::fabs(fX - curSite->
X()) +
y2xRatio * std::fabs(fY - curSite->
Y());
3798 inline std::vector<DeviceInfo::DeviceSite *> *
3800 float displacementThreshold,
int siteNumThreshold,
bool checkClockRegion =
false)
3803 std::vector<DeviceInfo::DeviceSite *> *res =
new std::vector<DeviceInfo::DeviceSite *>(0);
3806 getGridXY(targetX, targetY, binIdX, binIdY);
3808 int targetClockRegionX = -1;
3814 while (res->size() == 0)
3818 for (
auto sharedTypeId : sharedTypeIds)
3821 assert(binIdY >= 0);
3823 assert(binIdX >= 0);
3828 std::queue<std::pair<int, int>> binXYqueue;
3829 std::set<std::pair<int, int>> reachedBinXYs;
3830 binXYqueue.emplace(binIdX, binIdY);
3831 reachedBinXYs.emplace(binIdX, binIdY);
3833 while (binXYqueue.size() > 0)
3835 std::pair<int, int> curXY = binXYqueue.front();
3837 int curbinIdX = curXY.first, curbinIdY = curXY.second;
3841 if (bin2TargetXYDistance > displacementThreshold)
3843 int findSiteCnt = 0;
3846 if (!curSite->isOccupied() && !curSite->isMapped())
3848 if (
getDisplacement(targetX, targetY, curSite) < displacementThreshold)
3851 if (targetClockRegionX >= 0 && targetClockRegionX != curSite->getClockRegionX())
3853 res->push_back(curSite);
3858 if (res->size() < (
unsigned int)siteNumThreshold)
3860 for (
int nextY = curbinIdY - 1; nextY <= curbinIdY + 1; nextY++)
3862 for (
int nextX = curbinIdX - 1; nextX <= curbinIdX + 1; nextX++)
3874 if (nextBin2TargetXYDistance > displacementThreshold)
3876 std::pair<int, int> nextXY(nextX, nextY);
3877 if (reachedBinXYs.find(nextXY) == reachedBinXYs.end())
3879 reachedBinXYs.insert(nextXY);
3880 binXYqueue.push(nextXY);
3887 displacementThreshold *= 1.5;
3898 inline std::vector<DesignInfo::DesignCell *> &
getCells()
3915 double totalHPWL = 0.0;
3918 #pragma omp parallel for
3919 for (
int netId = 0; netId < numNet; netId++)
3922 net->updateNetBounds(
true,
true);
3926 for (
int netId = 0; netId < numNet; netId++)
3929 totalHPWL += net->getHPWL(
y2xRatio);
3941 double totalHPWL = 0.0;
3944 for (
int netId = 0; netId < numNet; netId++)
3947 totalHPWL += net->getHPWL(
y2xRatio);
4044 if (
JSONCfg[
"DirectMacroLegalize"] ==
"true")
4139 if (!tmpPin->isUnconnected())
4141 netIds[pinNumA] = tmpPin->getNet()->getElementIdInType();
4148 if (!tmpPin->isUnconnected())
4150 bool matched =
false;
4151 for (
int i = 0;
i < pinNumA;
i++)
4153 if (netIds[
i] >= 0 && netIds[
i] == tmpPin->getNet()->getElementIdInType())
4181 if (tmpPU->getNetsSetPtr()->size() >= 30)
4247 for (
auto clockNet : curPUClocks)
4248 curSetOfClocks.insert(clockNet);
4250 if (curSetOfClocks.size() <= clockColumn->getClockNumLimit())
4270 int oriClockNum = curSetOfClocks.size();
4272 for (
auto clockNet : curPUClocks)
4273 curSetOfClocks.insert(clockNet);
4275 return curSetOfClocks.size() - oriClockNum;
4283 for (
auto clockNet : curPUClocks)
4284 curSetOfClocks.insert(clockNet);
4286 for (
auto clockNet : curSetOfClocks)
4288 std::cout <<
"clock#" <<
i <<
" name: [" << clockNet->getName() <<
"]\n";
4306 for (
auto clockNet : curPUClocks)
4307 curSetOfClocks.insert(clockNet);
4308 assert(curSetOfClocks.size() <= clockColumn->getClockNumLimit());
4407 for (
int i = 0;
i <= 7;
i++)
4450 std::pair<std::map<PlacementInfo::PlacementUnit *, float>, std::map<PlacementInfo::PlacementUnit *, float>>
4456 std::map<PlacementInfo::PlacementUnit *, std::vector<DeviceInfo::DeviceSite *>>
PU2LegalSites;
void buildSimpleTimingGraph()
call timing info to build simple timing graph
std::map< std::string, std::string > & JSONCfg
unsigned int rightPinId_net
std::vector< std::vector< PlacementBinInfo * > > & getBinGrid(unsigned int BELTypeId)
Get the Bin Grid object.
int X()
return the column of the bin in the grid
std::map< DesignInfo::DesignCellType, int > cellType2sharedBELTypeOccupation
the resource demand of specific types. (cost how many slot/BELs)
Placement net, compared to design net, includes information related to placement.
float getGlobalBinMinLocY()
get bottom boundary of the bin grid
CompatiblePlacementTable * loadCompatiblePlacementTable(std::string cellType2fixedAmoFileName, std::string cellType2sharedCellTypeFileName, std::string sharedCellType2BELtypeFileName)
describes the type mapping from design to device, where a cell can be placed (which BEL in which site...
void calculateNetNumDistributionOfPUs()
calculate the proportion of the PlacementUnit objects with high interconnection density
float getProgress()
Get the Progress ratio of the placement.
void setDeterminedOccupation(int cellId, int occupation)
Set the Determined Occupation of a specific cell.
float getUtilizationRate()
Get the Utilization Rate: utilization / (capacity * binShrinkRatio)
void addPlacementUnit(PlacementInfo::PlacementUnit *curPU)
int getNetDistributionByDensity(int density)
DesignInfo::DesignCell * getCell(unsigned int id)
DesignInfo::DesignCellType getVirtualCellType(int vId)
int getUnitsBeDrivenByThisPU()
void setProgress(float p)
Set the progress ratio, indicating the progress of the placement convergence,.
~CompatiblePlacementTable()
std::vector< PlacementUnit * > & getUnitsBeDriven()
Get the reference of the vector of the PlacementUnits driven by the net.
std::vector< float > cellId2InfationRatio
DeviceInfo::DeviceSite * getLockedSite()
float getOccupation(DesignInfo::DesignCellType cellType)
Get the theoratical occupation of a specific cell type.
int numUnitsBeDrivenByThisPU
std::vector< PlacementUnit * > & getPlacementUnits()
bool isLegalLocation(DesignInfo::DesignCell *curCell, float targetX, float targetY)
check whether the PlacementUnit is legalized in the device area when a cell in it is placed at target...
float right()
return the right boundary of the bin
std::vector< DesignInfo::DesignCell * > & getCells()
float bottom()
return the bottom boundary of the bin
std::vector< std::vector< int > > cellId2SharedCellBELTypeID
std::vector< PlacementUnpackedCell * > & getPlacementUnpackedCells()
BEL bin for global placement for a specific shared BEL type.
std::vector< float > cellId2Occupation
float getUtilizationRate()
std::vector< PlacementUnit * > placementUnits
int getSharedBELTypeId(std::string tmpStr)
void optimizeLongPaths()
make the PlacementUnits in the long path closer to each other
std::vector< std::vector< PlacementUnit * > > & getLongPaths()
Get the Long Paths in the net list for later optimization.
std::vector< DesignInfo::DesignCell * > cellsInMacro
std::vector< int > & getPotentialBELTypeIDs(DesignInfo::DesignCellType cellType)
DesignInfo::DesignCell * cell
int getDeterminedOccupation(int cellId)
int bottomRegionY
the bottom row in the grid of clock regions
std::set< DesignInfo::DesignCell * > cells
float getActualOccupation(DesignInfo::DesignCell *cell)
Get the actual occupation of a specific cell.
std::vector< PlacementUnit * > unitsOfDriverPins
std::vector< std::vector< PlacementUnit * > > longPaths
std::pair< std::map< PlacementInfo::PlacementUnit *, float >, std::map< PlacementInfo::PlacementUnit *, float > > PULegalXY
a mapping from PlaceuementUnit objects to legalized locations
void setVirtualType(DesignCellType NewCellType)
Set the Virtual Type object which might override the actual type in later processing.
CompatiblePlacementTable * getCompatiblePlacementTable()
void addVirtualCell(DesignInfo *designInfo, DesignInfo::DesignCellType cellType, float x, float y)
add a virtual cell without given name into the macro with its offsets in the macro....
float getOverallEnhanceRatio()
Get the Overall Enhance Ratio (the entire net can be enhanced to a pre-defined extent....
std::set< DesignInfo::DesignCell * > & getCells()
Get the reference of the set of cells in the bin.
void adjustLUTFFUtilization_Clocking()
adjust the utlization of clock-related elements to mitigate the overflow of clock utilization
a fixed group of multiple standard cells with constraints of their relative locations
int rightRegionX
the right column in the grid of clock regions
bool isOverflow(float overflowThreshold)
check whether the resource demand in the bin is higher than the supply.
void setWeight(int numCell)
float getInflateRatio(DesignInfo::DesignCell *cell)
Get the inflate ratio of a cell.
void setBELTypeForCells(DesignInfo *designInfo)
std::string getFixedBELName()
a DesignCell in design netlist, DesignPin objects of which might connect to DesignNet objects
std::vector< CellBinInfo > & getCellId2CellBinInfo()
bool checkClockColumnLegalization(PlacementInfo::PlacementUnit *curPU, DeviceInfo::DeviceSite *curSite)
check whether the given PlacementUnit can be mapped to the site considering the half-column clock leg...
PlacementTimingInfo is the container which record the timing information related to placement.
void resetOverflowCounter()
bool isLegalLocation(PlacementUnit *curPU, float targetX, float targetY)
check whether the PlacementUnit is legalized in the device area when it is placed at target location
float endY
bottom boundary of the bin grid
std::vector< PlacementUnpackedCell * > placementUnpackedCells
a design net (hyperedge) defined in the design, connecting to pins of cells
std::map< DesignInfo::DesignCellType, std::vector< int > > cellType2sharedBELTypeIDs
the mapping from design cell type to device resource type ID
int mediumPathThresholdLevel
the medium path threshold for timing optimization
void dumpCongestion(std::string dumpFileName)
dump the congestion mesh grid for evaluation
void removeCell(DesignInfo::DesignCell *cell, int occupationAdded)
remove a design cell from the bin
bool isCellInMacro(DesignInfo::DesignCell *curCell)
void updateBound2BoundNetWeight(std::vector< Eigen::Triplet< float >> &objectiveMatrixTripletList, std::vector< float > &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector, float generalWeight, float y2xRatio, bool updateX, bool updateY, bool checkClockRegion=false)
update the weights of 2-pin nets between PlacementUnits in this hyperedge(PlacementNet) according to ...
float getCellOffsetYInMacro(DesignInfo::DesignCell *cell)
CompatiblePlacementTable * compatiblePlacementTable
The net between the objects of ClusterUnit class.
std::map< DesignInfo::DesignCell *, int > cell2IdInMacro
DeviceInfo::DeviceSite * lockedSite
std::vector< std::vector< PlacementNet * > > placementUnitId2Nets
void setSpreadLocation_WithLimitDisplacement(float x, float y, float forgetRatio, float limitDisplacement)
Set the Spread Location based on forgetting ratio.
@ PlacementMacroType_LCLB
float getGlobalBinMinLocX()
get left boundary of the bin grid
void getGridXY(float cellX, float cellY, int &binIdX, int &binIdY)
Get the Grid row/column based on given location X,Y.
std::vector< PlacementNet * > * getNetsSetPtr()
Get the Nets Set Ptr object which records the nets connecting to the PlacementUnit.
std::vector< float > PaintYs
void setPaintDataBase(PaintDataBase *_paintData)
void addClusterUnit(ClusterUnit *tmpCU)
std::vector< DesignPin * > & getPins()
Get the vector reference of the pins.
float getGlobalMinY()
Get the Global Min Y (bottom boundary of the device)
int getLongPathThresholdLevel()
@ PlacementMacroType_CARRY
std::vector< Location > cellId2location
void dumpVivadoPlacementTclWithPULegalizationInfo(std::string dumpFile)
dump the placement commands to place cells in Vivado (do not use this temporarily)
void adjustLUTFFUtilization_Routability(bool enfore)
adjust the resource demand of LUTs/FFs according to routing congestion refer to RippleFPGA's implemen...
std::set< std::string > BELNames
std::vector< Location > & getPinId2location()
std::vector< Location > & getCellId2location()
std::vector< PlacementBinInfo * > mergedBins
std::map< int, PlacementUnit * > & getCellId2PlacementUnit()
DesignCellType
design cell types
void getClockRegionByLocation(float locX, float locY, int &clockRegionX, int &clockRegionY)
Get the clock region ID (X/Y) by a given location (X/Y)
std::map< int, PlacementUnit * > cellId2PlacementUnit
float getMinYFromSites(std::vector< DeviceInfo::DeviceSite * > &sites)
Get the Min Y of sites to identify the boundary of the device.
std::vector< PlacementUnit * > & getCellId2PlacementUnitVec()
@ PlacementMacroType_MUX8
std::vector< PlacementInfo::PlacementUnit * > PUs
void inflateBinBy(float r)
increase the resource capacity by a given ratio
std::set< PlacementUnit * > & getPUSet()
@ PlacementMacroType_MUX9
A design pin on a design cell connected to a net.
void addCell(DesignInfo::DesignCell *cell, int occupationAdded)
add a design cell into the bin
std::vector< int > & getPotentialBELTypeIDs(DesignInfo::DesignCell *cell)
Get the Potential BEL Type IDs for a specific cell object.
void loadPlacementUnitInformation(std::string locationFile)
load the data of the PlacementUnit objects and some placement parameters from a checkpoint file
int leftRegionX
the left column in the grid of clock regions
int longPathThresholdLevel
the long path threshold for timing optimization
@ PlacementMacroType_MCLB
BEL bin for global placement for multiple specific shared BEL types.
std::vector< float > offsetY
struct PlacementInfo::PlacementMacro::_fixedPlacementInfo_inMacro fixedPlacementInfo_inMacro
some constaints of elements' relative locations are defined by the design. We need to record this.
bool inRange(float x, float y)
PlacementUnitType
Placement Instance Types.
void deleteLegalizationInfoFor(PlacementInfo::PlacementUnit *curPU)
remove the legalization information of a PlacementUnit object
std::pair< std::map< PlacementInfo::PlacementUnit *, float >, std::map< PlacementInfo::PlacementUnit *, float > > & getPULegalXY()
get the locations (pair of X,Y) of the legalized PlacementUnit objects
std::vector< DesignInfo::DesignCellType > cells_Type
DesignCellType getCellType()
void setClockRegionX(int _x)
Set the clock region X for this bin.
std::set< DesignInfo::DesignNet * > & getClockNets()
void setNetsSetPtr(std::vector< PlacementNet * > *_nets)
Set the Nets Set Ptr object which records the nets connecting to the PlacementUnit.
void addPseudoNetsInPlacementInfo(std::vector< Eigen::Triplet< float >> &objectiveMatrixTripletList, std::vector< float > &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector, PlacementUnit *tmpPU, float targetLoc, float pseudoWeight, float y2xRatio, bool updateX, bool updateY)
directly set weight in the quadratic Matrix and vector according to given request.
void setRequiredBinShrinkRatio(float r)
Set the Required Bin Shrink Ratio for a bin.
void printStat(bool verbose=false)
double updateB2BAndGetTotalHPWL()
update the B2B net model for the placement and get the total HPWL of all the nets in the design
void updateCells2PlacementUnits()
update the mapping from Cells to PlacementUnits, since sometime, PlacementUnits might change
std::vector< PlacementNet * > clockNets
This header file contains the classes of data for a standalone design netlist.
std::vector< DeviceInfo::DeviceSite * > correspondingSites
float startY
bottom boundary of the bin grid
@ PlacementMacroType_FFFFPair
bool LUTFFUtilizationAdjusted
std::vector< PlacementUnit * > cellId2PlacementUnitVec
float getMaxYFromSites(std::vector< DeviceInfo::DeviceSite * > &sites)
Get the Max Y of sites to identify the boundary of the device.
float getGlobalMaxX()
Get the Global Max X (right boundary of the device)
DeviceInfo * getDeviceInfo()
float getGlobalBinMaxLocY()
get top boundary of the bin grid
std::vector< PlacementMacro * > & getPlacementMacros()
void adjustLUTFFUtilization_Routability_Reset()
reset the inflate ratio of all the cells to be 1, for re-evaluation
unsigned int getPairPinNum(DesignInfo::DesignCell *LUTA, DesignInfo::DesignCell *LUTB)
Get the Pair Pin Num of two LUTs.
record the bin information for a cell (BELtype, column/row, resource demand)
std::string & getSharedCellType()
void increaseSWDemandBy(float additionalDemand)
increase the net routing demand of the bin
std::vector< std::vector< PlacementNet * > > & getPlacementUnitId2Nets()
std::string getBELType2FalseBELType(std::string curBELType)
get the remapped BEL type of a specific BEL type since some cell can be placed in sites of different ...
std::vector< PlacementMacro * > placementMacros
This header file contains the classes of data for a standalone device.
void resetCellOccupationToDefault()
forget the occupation adjustment by packing feasibility and routing congestion
@ PlacementMacroType_MUX7
std::vector< PlacementNet * > * nets
record the nets connected to this PlacementUnit
float switchDemandForNets
float getMacroLegalizationWeight()
Get the Macro Legalization Weight.
CompatiblePlacementTable * compatiblePlacementTable
void resetElementBinGrid()
clean the information in bin grid
std::string cellType2fixedAmoFileName
double getTotalHPWL()
get the total HPWL of all the nets in the design without updating the B2B net model for the placement
bool checkIsGlobalClock()
check the attribute isGlobalClock
float getUtilizationRate()
PlacementUnpackedCell(std::string name, int id, DesignInfo::DesignCell *cell)
Construct a new Placement Unpacked Cell object.
float getOccupation(DesignInfo::DesignCellType cellType)
Get the theoratical occupation of a specific cell type.
std::vector< PlacementUnit * > & getFixedPlacementUnits()
std::vector< DeviceInfo::DeviceSite * > * findNeiborSiteFromBinGrid(DesignInfo::DesignCell *curCell, float targetX, float targetY, float displacementThreshold, int siteNumThreshold, bool checkClockRegion=false)
find neibor device sites of a given cell from bin grid
ClockColumn * getClockHalfColumn()
void resetLUTFFDeterminedOccupation()
reset the LUTFFDeterminedOccupation object
float getActualOccupationByCellId(int id)
Get the Actual Occupation By Cell Id.
int getUnitsDriveThisPU()
@ PlacementMacroType_LUTLUTSeires
struct PlacementInfo::PlacementNet::_pinOffset pinOffset
This header file contains the classes of data which record the timing information related to placemen...
DesignInfo::DesignCell * addVirtualCell(std::string virtualCellName, DesignInfo *designInfo, DesignInfo::DesignCellType cellType, float x, float y)
add a virtual cell with a given name into the macro with its offsets in the macro....
void resetPULegalInformation()
forget all the legalization information
_pinOffset(float x, float y)
std::map< PlacementInfo::PlacementUnit *, std::vector< DeviceInfo::DeviceSite * > > & getPULegalSite()
get the sites occupied by the legalized PlacementUnit objects
std::vector< std::string > sharedCellBELTypes
some BEL types (design cells should be mapped to the BEL slot on FPGA device)
void reloadNets()
update PlacementNet objects when there are some updates of PlacementUnit objects (e....
unsigned int bottomPinId_net
_fixedPlacementInfo_inMacro(DesignInfo::DesignCell *cell, std::string siteName, std::string BELName)
some constaints of elements' relative locations are defined by the design. We need to record this.
void countNoOverflow()
increase one time of non-overflow situation
PlacementNet * getPlacementNetByDesignNetId(int netId)
@ PlacementUnitType_UnpackedCell
void updateElementBinGrid()
map design cells to the bins in the bin grid.
PlacementSiteTypeInfo(std::string siteType, std::vector< DeviceInfo::DeviceSite * > &correspondingSites)
Site class for site on device.
std::vector< ClusterUnit * > clusterUnits
float getRealUtilizationRate()
Get the theoratical utilization rate (use LUT theoratical resource utilization without any adjustment...
std::vector< std::vector< std::vector< PlacementBinInfo * > > > & getBinGrid()
Get the Bin Grid object for all types of BEL.
CompatiblePlacementTable(std::string cellType2fixedAmoFileName, std::string cellType2sharedCellTypeFileName, std::string sharedCellType2BELtypeFileName, DesignInfo *designInfo, DeviceInfo *deviceInfo)
Construct a new Compatible Placement Table object.
std::vector< PlacementUnit * > unitsOfNetPins
DesignInfo::DesignNet * designNet
struct PlacementInfo::PlacementSiteTypeInfo::location location
struct PlacementInfo::_ClockNetCoverage ClockNetCoverage
the retangular clock region coverage of a clock net
PlacementInfo * placementInfo
std::set< PlacementUnit * > PUSet
bool locked
if locked, the attributes of the PlacementUnit cannot be changed (more than fixed....
std::set< PlacementUnit * > PUSetContainingFF
std::vector< std::vector< int > > clockRegionUtilization
DeviceSite * getSite(std::string &Name)
std::vector< DesignInfo::DesignCell * > * findNeiborLUTFFsFromBinGrid(DesignInfo::DesignCell *curCell, float displacementUpperbound, int minNumNeighbor=10)
find neibor LUTs/FFs from bin grid
void addSiteIntoBin(DeviceInfo::DeviceSite *curSite)
add a resource site into the bin
std::vector< float > PaintXs
void verifyDeviceForDesign()
verify that each cells in the design can be mapped on the resource elements on the device.
bool canAddMore(int BELAmo)
check whether we can add some BEL demand to the bin
DesignInfo::DesignNet * getDesignNet()
Get the Design Net object.
std::vector< PlacementNet * > designNetId2PlacementNet
std::vector< DeviceInfo::DeviceSite * > correspondingSites
@ PlacementMacroType_LUTFFPair
std::map< PlacementInfo::PlacementUnit *, std::vector< DeviceInfo::DeviceSite * > > PU2LegalSites
a mapping from PlaceuementUnit objects to device sites
describes the type mapping from design to device, where a cell can be placed (which BEL in which site...
std::map< DesignInfo::DesignCellType, std::vector< std::string > > cellType2sharedBELTypes
the mapping from design cell type to device resource type
std::string sharedCellType2BELtypeFileName
void adjustLUTFFUtilization_Packablity(float neighborDisplacementUpperbound, bool enfore)
adjust the resource demand of LUTs/FFs according to packing feasibility
float getGlobalMinX()
Get the Global Min X (left boundary of the device)
float getDisplacement(float fX, float fY, DeviceInfo::DeviceSite *curSite)
Get the Displacement from a given location to a device site (y2xRatio is considered....
void getAnchorLocation(float &x, float &y)
float getCellOffsetXInMacro(DesignInfo::DesignCell *cell)
void enhanceHighFanoutNet()
std::set< DesignInfo::DesignNet * > clockNets
record the clock nets connected to this PlacementUnit
void shrinkBinBy(float r)
reduce the resource capacity by a given ratio
float getInflateRatio(DesignInfo::DesignCell *cell)
Get the inflate ratio of a cell.
float getDeviceMaxEdgeLength()
int getMediumPathThresholdLevel()
void setPULegalSite(std::map< PlacementInfo::PlacementUnit *, std::vector< DeviceInfo::DeviceSite * >> &PU2Sites)
set the sites occupied by the PlacementUnit objects
std::vector< location > potentialLocations
PlacementUnit * getPlacementUnitByCellId(int cellId)
std::vector< float > & getcellId2Occupation()
float getBinShrinkRatio()
float getPseudoNetWeight()
Get the Pseudo Net Weight object.
bool originallyIsLUTRAM()
void setClusterNum(int _clusterNum)
int dumpPlacementUnitLocationCnt
void setPULegalXY(std::map< PlacementInfo::PlacementUnit *, float > &PU2X, std::map< PlacementInfo::PlacementUnit *, float > &PU2Y)
set the legalization of some PlacementUnit objects
the retangular clock region coverage of a clock net
std::map< std::string, int > sharedCellBELTypeName2ID
unsigned int leftPinId_net
a movement unit in placement with information of location and resource demand
int getCellId()
Get the Cell Id in the cell list.
float getManhattanDistanceTo(float inX, float inY)
Get the shortest Manhattan distance from the bin to a specific location.
DesignInfo::DesignCell * getCell()
void setBELTypeForCells(DesignInfo *designInfo)
set the mapping from cells in design netlist to BEL type ID for later processing.
void addB2BNet(std::vector< Eigen::Triplet< float >> &objectiveMatrixTripletList, std::vector< float > &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector, int puId0, int puId1, float pos0, float pos1, float pinOffset0, float pinOffset1, bool movable0, bool movable1, float w)
set weights of the terms in the quadratic problem
std::vector< PlacementUnit * > fixedPlacementUnits
void addPseudoNet_enhancePin2Pin(std::vector< Eigen::Triplet< float >> &objectiveMatrixTripletList, std::vector< float > &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector, float generalWeight, float y2xRatio, bool updateX, bool updateY, int PUIdA, int PUIdB, int pinIdA_net, int pinIdB_net)
std::vector< std::vector< PlacementSiteBinInfo * > > & getSiteBinGrid()
void setSpreadLocation(float x, float y, float forgetRatio)
Set the Spread Location based on forgetting ratio.
void setLockedAt(std::string _siteName, std::string _BELName, DeviceInfo *deviceInfo, bool lock=true)
void recordSpreadLocatin()
void legalizeXYInArea(PlacementUnit *curPU, float &fX, float &fY)
move the PlacementUnit to ensure the cells in it are within the device area.
std::vector< std::vector< PlacementBinInfo * > > globalBinGrid
Bin Grid includes all types of sites, mainly for congestion evalution.
std::vector< DeviceInfo::DeviceSite * > correspondingSites
std::map< DeviceInfo::ClockColumn *, std::set< DesignInfo::DesignNet * > > & getClockCol2ClockNets()
information for a site, e.g. what BEL in site and where are these kind of sites
const std::vector< DeviceInfo::DeviceSite * > & correspondingSites
void resetLUTFFDeterminedOccupation()
reset the LUTFFDeterminedOccupation object
std::vector< int > PaintTypes
int macroPseudoNetEnhanceCnt
void drawNet(float generalWeight=1.0)
std::vector< int > & getPotentialBELTypeIDs(DesignInfo::DesignCellType cellType)
Get the potential BEL Type IDs for a specific cell type.
PlacementTimingInfo * getTimingInfo()
Site bin for global placement for some specific Site types.
std::vector< std::vector< PlacementSiteBinInfo * > > siteGridForMacros
void dumpOverflowClockUtilization()
void addOccupiedSite(float siteOffset, float occ)
for site-level cell spreading
void transferCellBinInfo(int cellId, float fX, int fY)
update the bin information of a design cell when it is moved to a new location
std::string getFixedSiteName()
float getMinXFromSites(std::vector< DeviceInfo::DeviceSite * > &sites)
Get the Min X of sites to identify the boundary of the device.
void addMacroSite(PlacementMacro *curMacro, float occupationAdded)
std::set< DesignInfo::DesignCell * > cellSet
std::vector< ClusterUnit * > & getUnits()
std::vector< float > defaultCellId2Occupation
float globalMinX
left boundary of the device
std::vector< PlacementUnit * > PUsContainingFF
void enhanceRiskyClockNet()
a group of PlacementUnits
std::string sharedCellType
void setCellBinInfo(int cellId, int sharedTypeId, int X, int Y, float occupation)
Set the cell bin Information of a design cell.
float getRequiredBinShrinkRatio()
bool inRange(float x, float y)
check if the bin covers a given location on the device
bool isClockLegalizationRisky()
bool updateNetBounds(bool updateX, bool updateY)
update the bounding box of the net
float PUWithManyNetsRatio
void setAnchorLocation(float x, float y)
Set the Anchor Location for the PlacementUnit.
std::ostream & operator<<(std::ostream &os, PlacementInfo::PlacementMacro *curMacro)
float getBinGridW()
Get the width of a bin in grid.
void addPUIntoClockColumn(PlacementInfo::PlacementUnit *curPU, DeviceInfo::DeviceSite *curSite)
map the given PlacementUnit to the site for later checking of the half-column clock legalization rule...
float endX
right boundary of the bin grid
PlacementUnitType getType()
std::vector< DesignCell * > & getCells()
std::set< DesignInfo::DesignCell * > cells
std::map< PlacementUnit *, int > & getPU2ClockRegionColumn()
get the PlacementUnit Mapping to clock region column for timing optimzation
float top()
return the top boundary of the bin
float getMaxXFromSites(std::vector< DeviceInfo::DeviceSite * > &sites)
Get the Max X of sites to identify the boundary of the device.
bool hasCell(DesignInfo::DesignCell *curCell)
float y2xRatio
a factor to tune the weights of the net spanning in Y-coordinate relative to the net spanning in X-co...
bool checkClockUtilization(bool dump)
check the utlization of the clock regions on the device
std::string getBELType2FalseBELType(std::string curBELType)
bool clockLegalizationRisky
void printOutClockColumnLegalization(PlacementInfo::PlacementUnit *curPU, DeviceInfo::DeviceSite *curSite)
void getPULocationByCellLocation(DesignInfo::DesignCell *curCell, float targetX, float targetY, float &PUX, float &PUY)
PlacementMacroType macroType
DesignInfo::DesignCell * cell
BEL(Basic Element of Logic), the smallest undividable element.
int getClockRegionX()
Get the clock region X for this bin.
std::vector< PlacementUnit * > & getDriverUnits()
Get the reference of the vector of the driver units that drive the net.
float globalMaxY
top boundary of the device
PlacementNet(DesignInfo::DesignNet *designNet, int id, std::vector< PlacementUnit * > &cellId2PlacementUnitVec, PlacementInfo *placementInfo)
Construct a new Placement Net object.
PaintDataBase * paintData
Information class related to FPGA device, including the details of BEL/Site/Tile/ClockRegion.
std::vector< pinOffset > pinOffsetsInUnit
void dumpPlacementUnitInformation(std::string dumpFile)
dump the PlacementUnit objects and some placement parameters as a checkpoint
PlacementMacro(std::string name, int id, PlacementMacroType macroType)
void enforceLegalizeXYInArea(PlacementUnit *curPU)
move the PlacementUnit to ensure the cells in it are within the device area.
std::vector< PlacementNet * > & getPlacementNets()
@ PlacementMacroType_HALFCLB
PlacementInfo(DesignInfo *designInfo, DeviceInfo *deviceInfo, std::map< std::string, std::string > &JSONCfg)
Construct a new Placement Info object based on the information of design and device.
int Y()
return the row of the bin in the grid
float switchSupplyForNets
bool inRange(float x, float y)
std::vector< std::vector< PlacementBinInfo * > > & getGlobalBinGrid()
void getVirtualCellInfo(int vId, float &x, float &y, DesignInfo::DesignCellType &cellType)
Get the virtual cell information, including offsets and cell type.
float getActualOccupation(DesignInfo::DesignCell *cell)
Get the actual occupation of a specific cell.
@ PlacementUnitType_Macro
void addCell(DesignInfo::DesignCell *curCell, DesignInfo::DesignCellType cellType, float x, float y)
add a real cell into the macro with its offsets in the macro
void setAnchorLocationAndForgetTheOriginalOne(float x, float y)
the smallest, indivisible, representable component. It will include only one standard cell
int getDeterminedOccupation(int cellId)
~PlacementHybridBinInfo()
PlacementUnit(std::string name, int id, PlacementUnitType unitType)
std::vector< PlacementUnit * > & getUnits()
Get the reference of the vector of PlacementUnits connected to the net The placement units in the vec...
float getSwitchDemandForNets() const
get the net routing demand of the bin
float left()
return the left boundary of the bin
void setMacroLegalizationParameters(int cnt, float _macroLegalizationWeight)
Set the Macro Legalization Parameters.
float getBinGridH()
Get the height of a bin in grid.
int getId()
Get the Id of the net in current placement procedure.
std::vector< float > & getcellId2Occupation()
get the reference of cellId2Occupation for convenience
std::set< DesignInfo::DesignCell * > cellInMacros
int getMacroPseudoNetEnhanceCnt()
Get the Macro Pseudo Net Enhance Counter.
void countOverflow()
increase one time of overflow situation
int getNoOverflowCounter()
bool canAddMore(int BELAmo)
std::map< PlacementUnit *, std::pair< float, float > > PU2ClockRegionCenters
float placementProressRatio
the progress ratio, indicating the progress of the placement convergence.
int getSharedBELTypeId(std::string tmpStr)
get the ID of SharedBELType from a string
std::vector< DesignInfo::DesignCell * > & getCells()
bool canAddMore(int BELAmo)
std::map< std::string, std::string > sharedCellType2SiteType
The mapping from shared cell types to device site types.
PlacementHybridBinInfo(PlacementBinInfo *curBin)
int netPinNumDistribution[8]
float lastProgressWhenLUTFFUtilAdjust
DesignInfo * getDesignInfo()
float getPinPairEnhanceRatio(int pinIdInNetA, int pinIdInNetB)
Get the Pin Pair Enhance Ratio (placer can customize some 2-pin interconnections to make their weight...
PlacementUnitType unitType
void updateLongPaths()
update the long path in the design and enhance their net weights
void resetBinShrinkRatio()
PlacementUnit * getPlacementUnitByCell(DesignInfo::DesignCell *curCell)
std::vector< pinOffset > & getPinOffsetsInUnit()
Get the Pin Offsets (x,y) of the Units object.
std::map< std::string, std::vector< std::string > > sharedCellType2BELNames
The mapping from shared cell types to device BEL types.
bool placed
the PlacementUnit is placed to BEL slot.
unsigned int topPinId_net
float globalMinY
bottom boundary of the device
DesignCell * addCell(DesignCell *curCell)
add a cell into the design information
float getActualOccupationByCellId(int id)
Get the Actual Occupation By Cell Id.
float startX
left boundary of the bin grid
std::vector< float > & getcellId2InfationRatio()
get the reference of cellId2InfationRatio for convenience
std::vector< std::vector< std::vector< PlacementBinInfo * > > > SharedBELTypeBinGrid
struct PlacementInfo::CellBinInfo CellBinInfo
record the bin information for a cell (BELtype, column/row, resource demand)
std::map< DeviceInfo::ClockColumn *, std::set< DesignInfo::DesignNet * > > clockCol2ClockNets
std::string cellType2sharedCellTypeFileName
void addCell(DesignInfo::DesignCell *cell, int occupationAdded)
float getPUWithManyNetsRatio()
get the proportion of the PlacementUnit objects with high interconnection density
float requiredBinShrinkRatio
void addSiteIntoBin(DeviceInfo::DeviceSite *curSite)
void adjustLUTFFUtilization(float neighborDisplacementUpperbound, bool enfore=false)
adjust the resource demand of LUTs/FFs according to packing feasibility and routing congestion
std::map< PlacementUnit *, std::pair< float, float > > & getPU2ClockRegionCenters()
get the PlacementUnit Mapping to clock region centers for timing optimzation
std::vector< DesignPin * > & getInputPins()
std::set< DesignNet * > & getClockNets()
Get the clock nets connected to this cell for later legalization.
int getMediumPathThresholdLevel()
std::vector< PlacementUnit * > unitsOfPinsBeDriven
void addFixedCellInfo(DesignInfo::DesignCell *cell, std::string siteName, std::string BELName)
add information of a fixed cell
std::vector< PlacementNet * > placementNets
float getHPWL(float y2xRatio)
get current HPWL of the net
std::map< PlacementUnit *, int > PU2ClockRegionColumn
std::vector< Location > pinId2location
float getNewHPWLByTrying(PlacementUnit *curPU, double targetPUX, double targetPUY, float y2xRatio) const
Get the New HPWL By Trying to move a PlacementUnit object.
void setMinHPWL(float val)
record the minimum HPWL during placement procedure
std::set< DesignInfo::DesignCell * > & getCells()
PlacementTimingInfo * simplePlacementTimingInfo
@ PlacementMacroType_BRAM
std::vector< PlacementMacro * > & getMacros()
PlacementMacroType getMacroType()
int getClockColumnUtilizationIncrease(PlacementInfo::PlacementUnit *curPU, DeviceInfo::DeviceSite *curSite)
check the clock resource increase extent if the given PlacementUnit can be mapped to the site conside...
PlacementSiteBinInfo(float leftX, float rightX, float bottomY, float topY, int row, int column)
std::vector< fixedPlacementInfo_inMacro > fixedCells
std::vector< fixedPlacementInfo_inMacro > & getFixedCellInfoVec()
std::vector< float > offsetX
PlacementBinInfo(std::string sharedCellType, float leftX, float rightX, float bottomY, float topY, int row, int column, CompatiblePlacementTable *compatiblePlacementTable)
Construct a new Placement Bin Info object.
std::map< std::string, int > realBELTypeName2ID
each actual BEL type gets an integer ID for checking
Information related to FPGA designs, including design cells and their interconnections.
void addB2BNetInPlacementInfo(std::vector< Eigen::Triplet< float >> &objectiveMatrixTripletList, std::vector< float > &objectiveMatrixDiag, Eigen::VectorXd &objectiveVector, int puId0, int puId1, float pos0, float pos1, float pinOffset0, float pinOffset1, bool movable0, bool movable1, float w)
directly set weight in the quadratic Matrix and vector according to given request.
bool contains(DesignInfo::DesignCell *cell)
void setPseudoNetWeight(float weight)
Set the Pseudo Net Weight according to a given value.
void setDeterminedOccupation(int cellId, int occupation)
Set the Determined Occupation of a specific cell.
std::vector< CellBinInfo > cellId2CellBinInfo
std::set< DesignInfo::DesignCell * > & getCellInMacros()
void removeCell(DesignInfo::DesignCell *cell, int occupationAdded)
void createGridBins(float binWidth, float binHeight)
Create a grid of bins on the device.
std::vector< std::string > realBELTypes
the actual BEL types according to the definition file
bool contains(DesignInfo::DesignCell *cell)
void buildSimpleTimingGraph()
build a simple timing graph, where the inner delay between pin paris for an element will be identical
float globalMaxX
right boundary of the device
bool fixed
fixed simply means the PlacementUnit cannot be moved.
std::vector< ClockNetCoverage > clockNetCoverages
int getLongPathThresholdLevel()
std::vector< int > & getPotentialBELTypeIDs(DesignInfo::DesignCell *cell)
float getGlobalBinMaxLocX()
get right boundary of the bin grid
float getGlobalMaxY()
Get the Global Max Y (top boundary of the device)
std::vector< std::vector< PlacementBinInfo * > > LUTFFBinGrid
Bin Grid for LUTs and FFs, mainly for searching neighbor elements during packing.
float macroLegalizationWeight
std::vector< DeviceInfo::DeviceSite * > & getCorrespondingSites()
Get the reference of the set of sites in the bin.
std::vector< PlacementMacro * > macros
Information related to FPGA placement (wirelength optimization, cell spreading, legalization,...
struct PlacementInfo::Location Location
std::vector< PlacementInfo::PlacementUnit * > & getUnits()
int topRegionY
the top row in the grid of clock regions
void resetNoOverflowCounter()