AMF-Placer
2.0
An Open-Source Timing-driven Analytical Mixed-size FPGA Placer
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Go to the documentation of this file.
186 if (
name.find(
'_') != std::string::npos)
188 std::string tmpName =
name.substr(
name.rfind(
'_') + 1,
name.size() -
name.rfind(
'_') - 1);
189 if (tmpName.find(
'Y') != std::string::npos)
191 siteY = std::stoi(tmpName.substr(tmpName.find(
'Y') + 1, tmpName.size() - tmpName.find(
'Y') - 1));
192 siteX = std::stoi(tmpName.substr(tmpName.find(
'X') + 1, tmpName.find(
'Y') - tmpName.find(
'X') - 1));
429 if (
name.rfind(
"X") != std::string::npos &&
name.rfind(
"Y") != std::string::npos)
494 if (curSite->
X() <
left)
498 if (curSite->
getName().find(
"SLICE") != std::string::npos)
500 if (curSite->
Y() >
top)
505 sites.push_back(curSite);
557 inline void setBoundary(
float _left,
float _right,
float _top,
float _bottom)
664 sites.push_back(curSite);
680 for (
auto clockColumn : row)
702 if (tmpSite->
getName().find(
"SLICE") != std::string::npos)
704 if (tmpSite->
Y() >
topY)
709 sites.push_back(tmpSite);
787 for (
auto clockColumn : row)
789 clockColumn->resetClockInfo();
804 float offsetXInRegion =
x -
leftX;
805 float offsetYInRegion =
y -
bottomY;
810 int colX = offsetXInRegion /
colWidth;
829 clockColumns[colY][colX]->addClockNetId(clockNetId, cellId);
842 for (
auto clockColumn : row)
846 if (clockColumn->getClockNum() > res)
848 res = clockColumn->getClockNum();
862 for (
auto clockColumn : row)
866 if (clockColumn->getClockNum() > res)
869 resPtr = clockColumn;
914 DeviceInfo(std::map<std::string, std::string> &
JSONCfg, std::string _deviceName);
917 for (
auto bel :
BELs)
919 for (
auto site :
sites)
921 for (
auto tile :
tiles)
944 void addBEL(std::string &BELName, std::string &BELType, DeviceSite *parentSite);
967 void addSite(std::string &siteName, std::string &
siteType,
float locx,
float locy,
int clockRegionX,
968 int clockRegionY, DeviceTile *parentTile);
974 void addTile(std::string &tileName, std::string &tileType);
1155 for (
auto curSite :
sites)
1157 if (!curSite->isOccupied())
1159 curSite->resetMapped();
1185 int resX = 0, resY = 0;
1208 clockRegionX = resX;
1209 clockRegionY = resY;
1253 return clockRegions[regionY][regionX]->getMaxUtilizationOfClockColumns();
void mapClockRegionToArray()
map recognized clock regions into an array for later clock utilization evaluation
void addClockAndCell(int clockNetId, int cellId, float x, float y)
add a cell into the clock region
std::vector< float > clockRegionXBounds
float getRight()
Get the Right boundary of the clock region.
ClockColumn * getMaxUtilizationClockColumnsPtr()
void resetAllSiteMapping()
remove the mapped flags for all sites without fixed elements
std::vector< std::vector< ClockRegion * > > clockRegions
DeviceElementType
types of the elements in a device
ClockRegion * clockRegion
int getElementIdInParent()
DeviceTile(std::string &name, std::string &tileType, DeviceInfo *device, int id)
Construct a new Device Tile object.
void setSiteLocation(float x, float y)
std::set< std::string > BELTypes
DeviceSite * getSiteWithName(std::string &siteName)
Get a site based on a given name.
void resetClockUtilizationInfo()
reset the clock utilization for each column in the clock region
std::map< std::string, float > name2offsetY
std::map< std::string, DeviceSite * > name2Site
std::vector< DeviceSite * > & getSitesInType(std::string &siteType)
Get sites of a specfic type.
std::vector< DeviceBEL * > BELs
std::vector< DeviceBEL * > & getBELs()
std::vector< ClockColumn * > & getClockColumns()
ClockColumn * clockHalfColumn
void setClockRegion(ClockRegion *_clockRegion)
bool mapped
a flag that this site is mapped to an design element (might be movable elements)
void getClockRegionByLocation(float locX, float locY, int &clockRegionX, int &clockRegionY)
Get the clock region ID (X/Y) by a given location (X/Y)
std::map< int, DeviceSite * > clockNetId2Sites
std::vector< ClockColumn * > clockColumns
std::vector< DeviceBEL * > & getChildrenBELs()
DeviceSitePinInfos * getSitePinInfos()
int getClockRegionNumY()
Get the number of rows of the clock region array.
void setBoundary(float _left, float _right, float _top, float _bottom)
Set the Boundary of the clock column.
a column of site in clock region
std::vector< DeviceSite * > sites
void addChildSite(DeviceElement *sitePtr)
void setSitePinInfos(DeviceSitePinInfos *_sitePins)
float getBottom()
Get the Bottom boundary of the clock region.
void setId(unsigned int _id)
std::string & getTileType()
DeviceBEL * getBEL(std::string &Name)
int getMaxUtilizationOfClockColumns()
Get the Max Utilization Of Clock Columns.
std::vector< DeviceSite * > sites
std::vector< DeviceTile * > tiles
DeviceSite(std::string &name, std::string &siteType, DeviceElement *parentPtr, float locX, float locY, int clockRegionX, int clockRegionY, int id)
Construct a new Device Site object.
ClockRegion(DeviceSite *curSite)
Construct a new Clock Region object.
int getMaxUtilizationOfClockColumns_InClockRegion(int regionX, int regionY)
Get the maximum utilization among the clock columns in clock region.
basic class of device element
std::vector< std::string > refPinsName
unsigned int getClockNumLimit()
std::string deviceArchievedTextFileName
void setTile(DeviceElement *parentTilePtr)
std::map< std::string, DeviceBEL * > name2BEL
std::vector< float > clockRegionYBounds
void addTile(std::string &tileName, std::string &tileType)
@ DeviceElementType_CLOCKREGION
ClockColumn * getClockHalfColumn()
DeviceTile * getTile(std::string &Name)
std::set< std::string > & getBELTypes()
get BEL types in the device
DeviceSitePinInfos * sitePins
std::vector< DeviceSite * > & getChildrenSites()
void printStat(bool verbose=false)
std::map< std::pair< int, int >, ClockRegion * > coord2ClockRegion
std::vector< DeviceSite * > childrenSites
void recordClockRelatedCell(float locX, float locY, int regionX, int regionY, int cellId, int netId)
record the information of cell in a specific clock region
std::set< std::string > siteTypes
Site class for site on device.
std::vector< DeviceSite * > & getSites()
void resetClockInfo()
reset the clock net information, including cells in it
ClockRegion * getClockRegion()
void addSiteTypes(std::string &strSiteType)
add a Site type into the set of the existing site types
DeviceBEL(std::string &name, std::string &BELType, DeviceElement *parentPtr, int id)
Construct a new Device BEL object.
std::vector< DeviceSite * > & getSites()
std::map< std::string, std::vector< DeviceBEL * > > BELType2BELs
std::map< std::string, DeviceTile * > name2Tile
class for clock regions on FPGA
DeviceSite * getSite(std::string &Name)
std::string specialPinOffsetFileName
DeviceBEL * getBELWithName(std::string &BELName)
get a BEL based on a given name
float getBoundaryTolerance()
void addSite(std::string &siteName, std::string &siteType, float locx, float locy, int clockRegionX, int clockRegionY, DeviceTile *parentTile)
add a site into the device information class
void mapSiteToClockColumns()
for the clock column constraints, we need to map site to columns.
std::vector< DeviceBEL * > & getBELsInType(std::string &BELType)
get BELs of a specific type
a class record the pin on the site boundary
DeviceTile * getTileWithName(std::string &tileName)
Get a tile With name.
DeviceElement * parentPtr
std::vector< DeviceSite * > childrenSites
bool occupied
a flag that this site is occupied by fixed element
std::vector< DeviceTile * > & getTiles()
std::string & getSiteType()
DeviceInfo(std::map< std::string, std::string > &JSONCfg, std::string _deviceName)
Construct a new Device Info object.
void setClockHalfColumn(ClockColumn *_clockHalfColumn)
std::map< std::string, std::vector< DeviceSite * > > siteType2Sites
std::set< std::string > & getTileTypes()
Get the tile types in the device.
void addTileTypes(std::string &strTileType)
std::vector< DeviceSite * > & getChildrenSites()
void addClockNetId(int clockNetId, int cellId)
add a cell in a specific clock domain
void addChildSite(DeviceElement *parentSitePtr)
Set the Parent Site object.
void setSite(DeviceElement *parentPtr)
bool isMapped()
check whether this site is mapped to an design element (might be movable elements)
std::string getBELType2FalseBELType(std::string curBELType)
void addBELTypes(std::string &strBELType)
add a BEL type into the set of the existing BEL types
int getClockRegionNumX()
Get the number of columns of the clock region array.
DeviceElement * getParentPtr()
std::vector< DeviceTile * > & getTilesInType(std::string &tileType)
Get the tiles of a specific type.
std::map< std::string, float > name2offsetX
BEL(Basic Element of Logic), the smallest undividable element.
DeviceElementType getElementType()
std::string BELType
BEL Type recorded by a string (for flexibility)
std::vector< std::vector< ClockColumn * > > & getClockColumns()
Information class related to FPGA device, including the details of BEL/Site/Tile/ClockRegion.
void addSite(DeviceSite *tmpSite)
add a site in the clock region and update the boundary of the clock region
std::vector< DeviceBEL * > childrenBELs
void setParentSite(DeviceElement *parentSitePtr)
Set the Parent Site object.
DeviceSite * getParentSite()
DeviceElement(std::string &name, DeviceElement *parentPtr, DeviceElementType type, int id)
std::map< std::string, std::vector< DeviceTile * > > tileType2Tiles
std::set< std::string > tileTypes
std::set< DeviceTile * > tiles
@ DeviceElementType_Device
std::map< std::string, std::string > BELType2FalseBELType
std::map< std::string, std::string > & JSONCfg
bool isOccupied()
check whether this site is occupied by fixed element
void loadPCIEPinOffset(std::string specialPinOffsetFileName)
load the detailed location information of pins on PCIE IO slot
std::map< int, std::vector< int > > clockNetId2CellIds
the elements for each clock in the clock column
std::vector< std::vector< ClockColumn * > > clockColumns
void addChildBEL(DeviceBEL *child)
std::map< int, std::vector< int > > & getClockNetId2CellIds()
std::map< int, int > clockNetId2Cnt
counter for the elements for each clock in the clock column
std::string & getDeviceName()
void loadBELType2FalseBELType(std::string curFileName)
load BEL type remapping information since some cell can be placed in sites of different sites....
void addBEL(std::string &BELName, std::string &BELType, DeviceSite *parentSite)
add a BEL element into the device information
float getLeft()
Get the Left boundary of the clock region.
std::vector< DeviceSite * > sites
DeviceElement(std::string &name, DeviceElementType type, int id)
A tile is a combination of sites.
float getTop()
Get the Top boundary of the clock region.
void addSite(DeviceSite *curSite)
std::string & getBELType()
std::vector< std::vector< ClockRegion * > > & getClockRegions()
Get the Clock Regions in an 2D array clockregion[Y][X].
std::set< std::string > & getSiteTypes()
Get the Site Types in the device.