AMF-Placer  2.0
An Open-Source Timing-driven Analytical Mixed-size FPGA Placer
InitialPacker.h
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1 
26 #ifndef _INITIALPACKER
27 #define _INITIALPACKER
28 
29 #include "DesignInfo.h"
30 #include "DeviceInfo.h"
31 #include "PlacementInfo.h"
32 #include "readZip.h"
33 #include "strPrint.h"
34 #include "stringCheck.h"
35 #include <assert.h>
36 #include <cmath>
37 #include <fstream>
38 #include <iostream>
39 #include <map>
40 #include <queue>
41 #include <set>
42 #include <sstream>
43 #include <string>
44 #include <vector>
45 
51 {
52  public:
62  std::map<std::string, std::string> &JSONCfg)
64  compatiblePlacementTable(placementInfo->getCompatiblePlacementTable()),
65  placementUnits(placementInfo->getPlacementUnits()),
66  placementUnpackedCells(placementInfo->getPlacementUnpackedCells()),
67  placementMacros(placementInfo->getPlacementMacros()),
68  fixedPlacementUnits(placementInfo->getFixedPlacementUnits()), cellInMacros(placementInfo->getCellInMacros()),
69  cellId2PlacementUnit(placementInfo->getCellId2PlacementUnit()),
70  cellId2PlacementUnitVec(placementInfo->getCellId2PlacementUnitVec()), JSONCfg(JSONCfg)
71  {
72  if (JSONCfg.find("DSPCritical") != JSONCfg.end())
73  DSPCritical = JSONCfg["DSPCritical"] == "true";
74  }
75 
80  void pack();
81 
91  std::vector<DesignInfo::DesignCell *>
92  BFSExpandViaSpecifiedPorts(std::string portPattern, DesignInfo::DesignCell *startCell, bool exactMatch = false);
93  std::vector<DesignInfo::DesignCell *> BFSExpandViaSpecifiedPorts(std::vector<std::string> portPatterns,
94  DesignInfo::DesignCell *startCell,
95  bool exactMatch = false);
96 
103  void findDSPMacros();
104  void setDSPRegs(std::vector<DesignInfo::DesignCell *> &DSPTailsToBeCheckedRegisterAttr);
105 
111  void findLUTRAMMacros();
112 
119  void findBRAMMacros();
120 
128  std::vector<DesignInfo::DesignCell *> checkCompatibleFFs(std::vector<DesignInfo::DesignCell *> FFs);
129 
138  void findCARRYMacros();
139 
148  void findMuxMacros();
149 
156  void loadOtherCLBMacros(std::string RAMMacroListFromVivadoFileName);
157 
164  void LUTFFPairing();
165 
170  void findUnpackedUnits();
171 
178  void loadFixedPlacementUnits(std::string fixedPlacementUnitsFromVivadoFileName);
179 
184  void enhanceIONets();
185 
186  void dumpMacroHighLight();
187 
188  private:
197  {
198  public:
200  {
201  FFs.clear();
202  };
203 
205  : CSId(curFF->getControlSetInfo()->getId()), CLK(curFF->getControlSetInfo()->getCLK()),
206  SR(curFF->getControlSetInfo()->getSR()), CE(curFF->getControlSetInfo()->getCE())
207  {
208  FFs.clear();
209  FFs.push_back(curFF);
210  };
211 
212  PackedControlSet(const PackedControlSet &anotherControlSet)
213  {
214  FFs.clear();
215  assert(anotherControlSet.getSize() > 0 && "the other one control set should not be empty.");
216  CSId = anotherControlSet.getCSId();
217  FFs = anotherControlSet.getFFs();
218  };
219 
220  PackedControlSet &operator=(const PackedControlSet &anotherControlSet)
221  {
222  FFs.clear();
223  assert(anotherControlSet.getSize() > 0 && "the other one control set should not be empty.");
224  CSId = anotherControlSet.getCSId();
225  FFs = anotherControlSet.getFFs();
226  return *this;
227  };
228 
230 
231  inline unsigned int getSize() const
232  {
233  return FFs.size();
234  }
235 
236  inline const std::vector<DesignInfo::DesignCell *> &getFFs() const
237  {
238  return FFs;
239  }
240 
241  inline void addFF(DesignInfo::DesignCell *curFF)
242  {
243  if (CSId < 0)
244  {
245  if (!curFF->isVirtualCell())
246  {
247  assert(curFF->getControlSetInfo());
248  CSId = curFF->getControlSetInfo()->getId();
249  CLK = curFF->getControlSetInfo()->getCLK();
250  SR = curFF->getControlSetInfo()->getSR();
251  CE = curFF->getControlSetInfo()->getCE();
252  }
253  }
254  else
255  {
256  if (!curFF->isVirtualCell())
257  {
258  assert(curFF->getControlSetInfo()->getId() == CSId);
259  }
260  }
261  FFs.push_back(curFF);
262  }
263 
264  inline void removeXthFF(int i)
265  {
266  FFs.erase(FFs.begin() + i);
267  }
268 
269  inline int findFF(DesignInfo::DesignCell *curFF)
270  {
271  for (unsigned int i = 0; i < FFs.size(); i++)
272  {
273  if (FFs[i] == curFF)
274  return i;
275  }
276  return -1;
277  }
278 
279  inline int getCSId() const
280  {
281  return CSId;
282  }
283 
284  inline void setCSId(int _CSId)
285  {
286  CSId = _CSId;
287  }
288 
290  {
291  assert(CSId >= 0);
292  return CLK;
293  }
294 
296  {
297  assert(CSId >= 0);
298  return SR;
299  }
300 
301  private:
302  int CSId = -1;
306  std::vector<DesignInfo::DesignCell *> FFs;
307  };
308 
314  {
315  public:
317  {
318  Carry = nullptr;
319  for (int i = 0; i < 2; i++)
320  {
321  MuxF8[i] = nullptr;
322  for (int j = 0; j < 2; j++)
323  {
324  MuxF7[i][j] = nullptr;
325  for (int k = 0; k < 4; k++)
326  {
327  LUTs[i][j][k] = nullptr;
328  FFs[i][j][k] = nullptr;
329  }
330  }
331  }
332  }
333 
335  {
336  }
337 
339  {{nullptr, nullptr, nullptr, nullptr}, {nullptr, nullptr, nullptr, nullptr}},
340  {{nullptr, nullptr, nullptr, nullptr},
341  {nullptr, nullptr, nullptr, nullptr}}}; // [bottom_Or_Top][6 or 5][which Slot]
343  {{nullptr, nullptr, nullptr, nullptr}, {nullptr, nullptr, nullptr, nullptr}},
344  {{nullptr, nullptr, nullptr, nullptr},
345  {nullptr, nullptr, nullptr, nullptr}}}; // [bottom_Or_Top][FF or FF2][which Slot]
346  DesignInfo::DesignCell *MuxF7[2][2] = {{nullptr, nullptr}, {nullptr, nullptr}}; // [bottom_Or_Top][which Slot]
347  DesignInfo::DesignCell *MuxF8[2] = {nullptr, nullptr};
349  };
350 
355 
356  std::vector<PlacementInfo::PlacementUnit *> &placementUnits;
357  std::vector<PlacementInfo::PlacementUnpackedCell *> &placementUnpackedCells;
358  std::vector<PlacementInfo::PlacementMacro *> &placementMacros;
359  std::vector<PlacementInfo::PlacementUnit *> &fixedPlacementUnits;
360 
361  std::set<DesignInfo::DesignCell *> &cellInMacros;
362  std::map<int, PlacementInfo::PlacementUnit *> &cellId2PlacementUnit;
363  std::vector<PlacementInfo::PlacementUnit *> &cellId2PlacementUnitVec;
364  std::map<std::string, std::string> &JSONCfg;
365  bool DSPCritical = false;
366 
368  float CARRYChainSiteOffset);
369 };
370 
371 #endif
DesignInfo::DesignCell::isVirtualCell
bool isVirtualCell()
Definition: DesignInfo.h:1042
readZip.h
InitialPacker::dumpMacroHighLight
void dumpMacroHighLight()
Definition: InitialPacker.cc:1744
InitialPacker::JSONCfg
std::map< std::string, std::string > & JSONCfg
Definition: InitialPacker.h:364
InitialPacker
InitialPacker will identify macros from the design netlist based on pattern matching.
Definition: InitialPacker.h:51
InitialPacker::cellId2PlacementUnit
std::map< int, PlacementInfo::PlacementUnit * > & cellId2PlacementUnit
Definition: InitialPacker.h:362
InitialPacker::PackedControlSet::getSize
unsigned int getSize() const
Definition: InitialPacker.h:231
InitialPacker::PackedControlSet::findFF
int findFF(DesignInfo::DesignCell *curFF)
Definition: InitialPacker.h:269
InitialPacker::placementInfo
PlacementInfo * placementInfo
Definition: InitialPacker.h:353
InitialPacker::placementMacros
std::vector< PlacementInfo::PlacementMacro * > & placementMacros
Definition: InitialPacker.h:358
InitialPacker::loadOtherCLBMacros
void loadOtherCLBMacros(std::string RAMMacroListFromVivadoFileName)
load the special macros from the design file. vendors might allow users to specify some primitive mac...
Definition: InitialPacker.cc:1448
PlacementInfo::PlacementMacro
a fixed group of multiple standard cells with constraints of their relative locations
Definition: PlacementInfo.h:1525
InitialPacker::compatiblePlacementTable
PlacementInfo::CompatiblePlacementTable * compatiblePlacementTable
Definition: InitialPacker.h:354
InitialPacker::designInfo
DesignInfo * designInfo
Definition: InitialPacker.h:351
DesignInfo::DesignCell
a DesignCell in design netlist, DesignPin objects of which might connect to DesignNet objects
Definition: DesignInfo.h:782
InitialPacker::loadFixedPlacementUnits
void loadFixedPlacementUnits(std::string fixedPlacementUnitsFromVivadoFileName)
load the fixed elements (e.g., IOs) from the design file.
Definition: InitialPacker.cc:1671
InitialPacker::PackedControlSet::SR
DesignInfo::DesignNet * SR
Definition: InitialPacker.h:304
DesignInfo::DesignNet
a design net (hyperedge) defined in the design, connecting to pins of cells
Definition: DesignInfo.h:525
InitialPacker::SiteBELMapping::Carry
DesignInfo::DesignCell * Carry
Definition: InitialPacker.h:348
InitialPacker::SiteBELMapping::SiteBELMapping
SiteBELMapping()
Definition: InitialPacker.h:316
InitialPacker::SiteBELMapping::MuxF8
DesignInfo::DesignCell * MuxF8[2]
Definition: InitialPacker.h:347
InitialPacker::SiteBELMapping::~SiteBELMapping
~SiteBELMapping()
Definition: InitialPacker.h:334
DesignInfo::ControlSetInfo::getCE
DesignInfo::DesignNet * getCE() const
Definition: DesignInfo.h:1264
InitialPacker::findDSPMacros
void findDSPMacros()
detects DSP macros and clusters the related cells into PlacementInfo::PlacementMacro
Definition: InitialPacker.cc:215
InitialPacker::PackedControlSet::operator=
PackedControlSet & operator=(const PackedControlSet &anotherControlSet)
Definition: InitialPacker.h:220
InitialPacker::placementUnits
std::vector< PlacementInfo::PlacementUnit * > & placementUnits
Definition: InitialPacker.h:356
InitialPacker::PackedControlSet::CE
DesignInfo::DesignNet * CE
Definition: InitialPacker.h:305
InitialPacker::checkCompatibleFFs
std::vector< DesignInfo::DesignCell * > checkCompatibleFFs(std::vector< DesignInfo::DesignCell * > FFs)
check the control set of the candidate FFs and select the control set with the most FFs to be packed ...
Definition: InitialPacker.cc:534
DesignInfo.h
This header file contains the classes of data for a standalone design netlist.
DesignInfo::ControlSetInfo::getCLK
DesignInfo::DesignNet * getCLK() const
Definition: DesignInfo.h:1256
InitialPacker::SiteBELMapping::MuxF7
DesignInfo::DesignCell * MuxF7[2][2]
Definition: InitialPacker.h:346
DeviceInfo.h
This header file contains the classes of data for a standalone device.
InitialPacker::findLUTRAMMacros
void findLUTRAMMacros()
detects LUTRAM macros and clusters the related cells into PlacementInfo::PlacementMacro
Definition: InitialPacker.cc:362
InitialPacker::PackedControlSet::getSR
DesignInfo::DesignNet * getSR()
Definition: InitialPacker.h:295
InitialPacker::PackedControlSet::PackedControlSet
PackedControlSet(const PackedControlSet &anotherControlSet)
Definition: InitialPacker.h:212
InitialPacker::SiteBELMapping::LUTs
DesignInfo::DesignCell * LUTs[2][2][4]
Definition: InitialPacker.h:338
InitialPacker::cellId2PlacementUnitVec
std::vector< PlacementInfo::PlacementUnit * > & cellId2PlacementUnitVec
Definition: InitialPacker.h:363
stringCheck.h
InitialPacker::PackedControlSet::PackedControlSet
PackedControlSet(DesignInfo::DesignCell *curFF)
Definition: InitialPacker.h:204
DesignInfo::ControlSetInfo::getSR
DesignInfo::DesignNet * getSR() const
Definition: DesignInfo.h:1260
strPrint.h
InitialPacker::setDSPRegs
void setDSPRegs(std::vector< DesignInfo::DesignCell * > &DSPTailsToBeCheckedRegisterAttr)
Definition: InitialPacker.cc:307
InitialPacker::cellInMacros
std::set< DesignInfo::DesignCell * > & cellInMacros
Definition: InitialPacker.h:361
InitialPacker::fixedPlacementUnits
std::vector< PlacementInfo::PlacementUnit * > & fixedPlacementUnits
Definition: InitialPacker.h:359
PlacementInfo::CompatiblePlacementTable
describes the type mapping from design to device, where a cell can be placed (which BEL in which site...
Definition: PlacementInfo.h:94
InitialPacker::PackedControlSet::getFFs
const std::vector< DesignInfo::DesignCell * > & getFFs() const
Definition: InitialPacker.h:236
InitialPacker::deviceInfo
DeviceInfo * deviceInfo
Definition: InitialPacker.h:352
InitialPacker::pack
void pack()
extract the macros from the netlist to construction PlacmentMacro
Definition: InitialPacker.cc:28
InitialPacker::PackedControlSet::getCLK
DesignInfo::DesignNet * getCLK()
Definition: InitialPacker.h:289
InitialPacker::findUnpackedUnits
void findUnpackedUnits()
other non-Macro elements will be instantiated as PlacementInfo::PlacementUnpackedCell
Definition: InitialPacker.cc:1640
InitialPacker::LUTFFPairing
void LUTFFPairing()
directly pack some LUTs/FFs if the LUT has only one fan-out.
Definition: InitialPacker.cc:1564
InitialPacker::findMuxMacros
void findMuxMacros()
detects Mux macros and clusters the related cells into PlacementInfo::PlacementMacro
Definition: InitialPacker.cc:1202
DesignInfo::DesignCell::getControlSetInfo
ControlSetInfo * getControlSetInfo()
Get the Control Set Info object of this cell.
Definition: DesignInfo.h:1054
InitialPacker::InitialPacker
InitialPacker(DesignInfo *designInfo, DeviceInfo *deviceInfo, PlacementInfo *placementInfo, std::map< std::string, std::string > &JSONCfg)
Construct a new Initial Packer object.
Definition: InitialPacker.h:61
InitialPacker::PackedControlSet::CSId
int CSId
Definition: InitialPacker.h:302
InitialPacker::PackedControlSet::FFs
std::vector< DesignInfo::DesignCell * > FFs
Definition: InitialPacker.h:306
InitialPacker::BFSExpandViaSpecifiedPorts
std::vector< DesignInfo::DesignCell * > BFSExpandViaSpecifiedPorts(std::string portPattern, DesignInfo::DesignCell *startCell, bool exactMatch=false)
BFS to find the core cells of a macro based on some pre-defined patterns of cascaded cells.
Definition: InitialPacker.cc:118
InitialPacker::placementUnpackedCells
std::vector< PlacementInfo::PlacementUnpackedCell * > & placementUnpackedCells
Definition: InitialPacker.h:357
InitialPacker::mapCarryRelatedRouteThru
void mapCarryRelatedRouteThru(PlacementInfo::PlacementMacro *CARRYChain, DesignInfo::DesignCell *coreCell, float CARRYChainSiteOffset)
Definition: InitialPacker.cc:592
DeviceInfo
Information class related to FPGA device, including the details of BEL/Site/Tile/ClockRegion.
Definition: DeviceInfo.h:43
InitialPacker::SiteBELMapping
SiteBELMapping is a contain recording the mapping between cells and BELs.
Definition: InitialPacker.h:314
InitialPacker::PackedControlSet
control set information container used during initial packing.
Definition: InitialPacker.h:197
InitialPacker::PackedControlSet::~PackedControlSet
~PackedControlSet()
Definition: InitialPacker.h:229
checkHalfColumn.i
int i
Definition: checkHalfColumn.py:5
DesignInfo::ControlSetInfo::getId
const int getId() const
Get the Id of the control set (each control set will have a unique Id)
Definition: DesignInfo.h:1278
InitialPacker::DSPCritical
bool DSPCritical
Definition: InitialPacker.h:365
InitialPacker::PackedControlSet::setCSId
void setCSId(int _CSId)
Definition: InitialPacker.h:284
InitialPacker::SiteBELMapping::FFs
DesignInfo::DesignCell * FFs[2][2][4]
Definition: InitialPacker.h:342
PlacementInfo.h
This header file mainly contains the definition of class PlacementInfo, including information related...
InitialPacker::PackedControlSet::addFF
void addFF(DesignInfo::DesignCell *curFF)
Definition: InitialPacker.h:241
InitialPacker::enhanceIONets
void enhanceIONets()
enhance the nets connected to the IO ports
Definition: InitialPacker.cc:96
InitialPacker::PackedControlSet::getCSId
int getCSId() const
Definition: InitialPacker.h:279
DesignInfo
Information related to FPGA designs, including design cells and their interconnections.
Definition: DesignInfo.h:51
InitialPacker::PackedControlSet::CLK
DesignInfo::DesignNet * CLK
Definition: InitialPacker.h:303
InitialPacker::findBRAMMacros
void findBRAMMacros()
detects BRAM macros and clusters the related cells into PlacementInfo::PlacementMacro
Definition: InitialPacker.cc:408
InitialPacker::PackedControlSet::removeXthFF
void removeXthFF(int i)
Definition: InitialPacker.h:264
InitialPacker::PackedControlSet::PackedControlSet
PackedControlSet()
Definition: InitialPacker.h:199
PlacementInfo
Information related to FPGA placement (wirelength optimization, cell spreading, legalization,...
Definition: PlacementInfo.h:59
InitialPacker::findCARRYMacros
void findCARRYMacros()
detects CARRY macros and clusters the related cells into PlacementInfo::PlacementMacro
Definition: InitialPacker.cc:815