AMF-Placer
2.0
An Open-Source Timing-driven Analytical Mixed-size FPGA Placer
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This implementation file contains APIs' implementation related to the CLBSite-level processes in the ParallelCLBPacker which finally packs LUT/FF/MUX/CARRY elements into legal CLB sites in a parallel approach. More...
#include "ParallelCLBPacker.h"
Go to the source code of this file.
Functions | |
bool | isLUT6 (DesignInfo::DesignCell *cell) |
This implementation file contains APIs' implementation related to the CLBSite-level processes in the ParallelCLBPacker which finally packs LUT/FF/MUX/CARRY elements into legal CLB sites in a parallel approach.
Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
Definition in file ParallelCLBPacker_PackingCLBSite.cc.
bool isLUT6 | ( | DesignInfo::DesignCell * | cell | ) |
Definition at line 536 of file ParallelCLBPacker_PackingCLBSite.cc.
Referenced by ParallelCLBPacker::PackingCLBSite::finalMapToSlotsForCarrySite(), ParallelCLBPacker::PackingCLBSite::finalMapToSlotsForCommonLUTFFInSite(), ParallelCLBPacker::PackingCLBSite::greedyMapMuxForCommonLUTFFInSite(), and ParallelCLBPacker::PackingCLBSite::PackingCLBCluster::maxCardinalityMatching().