AMF-Placer  2.0
An Open-Source Timing-driven Analytical Mixed-size FPGA Placer
extractNetlist.tcl
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1 set fo [open "${pahtPrefix}allCellPinNet" "w"]
2 set allCells [xilinx::designutils::get_leaf_cells *]
3 foreach curCell $allCells {
4  set curCelltype [get_property REF_NAME $curCell]
5  puts $fo "curCell=> $curCell type=> $curCelltype"
6  set cellPins [get_pins -leaf -of_objects [get_cells $curCell]]
7  foreach curPin $cellPins {
8  set pinDir [get_property DIRECTION $curPin]
9  set pinNameAtCell [get_property REF_PIN_NAME $curPin]
10  set pinNet [get_nets -of [get_pins $curPin]]
11  set tmp_net $pinNet
12  set tmp_net_driver_pin [get_pins -leaf -of_objects $tmp_net -filter {DIRECTION == OUT}]
13  puts $fo " pin=> $curPin refpin=> $pinNameAtCell dir=> $pinDir net=> $pinNet drivepin=> $tmp_net_driver_pin"
14  }
15 }
16 close $fo
17 
18 set fo [open "${pahtPrefix}clocks" "w"]
19 set clocks [get_nets -hierarchical -top_net_of_hierarchical_group -filter { TYPE == "GLOBAL_CLOCK" } ]
20 foreach curClock $clocks {
21  set tmp_net_driver_pin [get_pins -leaf -of_objects $curClock -filter {DIRECTION == OUT}]
22  puts $fo "$tmp_net_driver_pin"
23 }
24 close $fo